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Two 130nm CMOS class-D RF power amplifiers suitable for polar transmitter architectures
Lund University.ORCID iD: 0000-0001-9188-4566
Lund University.
2008 (English)In: 9th International Conference on Solid-State and Integrated-Circuit Technology, ICSICT 2008., IEEE Press, 2008, 1380-1383 p.Conference paper (Refereed)
Abstract [en]

Two class-D RF power amplifiers consisting of CMOS inverter chains have been designed and measured. The first amplifier operates at 1GHz and has a maximum output power of 12dBm, whereas the second operates at 1.5GHz and outputs a maximum of 6dBm. The amplifiers have been characterized for use in two different polar transmitter architectures, Pulse Width Modulation by Variable Gate Bias (PWMVGB) and Envelope Elimination and Restoration (EER). Using a standard 130nm digital CMOS process and off-chip passive components, maximum drain efficiencies of 32% and 39%, respectively, are achieved. The two amplifiers are compared with respect to output power and drain efficiency, including a qualitative analysis of losses. Moreover, their use in the two polar transmitter architectures is discussed.

Place, publisher, year, edition, pages
IEEE Press, 2008. 1380-1383 p.
National Category
Other Electrical Engineering, Electronic Engineering, Information Engineering
Identifiers
URN: urn:nbn:se:lnu:diva-61595DOI: 10.1109/ICSICT.2008.4734800ISI: 000265971002021ISBN: 978-1-4244-2185-5 (print)ISBN: 978-1-4244-2186-2 OAI: oai:DiVA.org:lnu-61595DiVA: diva2:1083603
Conference
International conference on solid-state and integrated circuit technology, 20-23 Oct. 2008, Beijing, China,
Available from: 2017-03-21 Created: 2017-03-21 Last updated: 2017-03-22Bibliographically approved

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CiteExportLink to record
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Cite
Citation style
  • apa
  • harvard1
  • ieee
  • modern-language-association-8th-edition
  • vancouver
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More styles
Language
  • de-DE
  • en-GB
  • en-US
  • fi-FI
  • nn-NO
  • nn-NB
  • sv-SE
  • Other locale
More languages
Output format
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  • text
  • asciidoc
  • rtf