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A 2.4GHz CMOS Power Amplifier Using Internal Frequency Doubling
Lund University.ORCID iD: 0000-0001-9188-4566
Lund University.
Lund University.
2005 (English)In: IEEE International Symposium on Circuits and Systems, 2005. ISCAS 2005, Kobe, Japan: IEEE Press, 2005, 2683-2686 p.Conference paper (Refereed)
Abstract [en]

A fully integrated 0.18 /spl mu/m 1P6M CMOS power amplifier using internal frequency doubling is presented. Two chips were measured, one stand-alone PA and one PA with a VCO on the same chip. Since the PA and VCO operate at different frequencies, this configuration is suitable for direct-upconversion or low-IF upconversion since oscillator pulling is reduced. The maximum output power is 15 dBm, and the maximum drain efficiency is 10.7% at an output operating frequency of 2.4 GHz.

Place, publisher, year, edition, pages
Kobe, Japan: IEEE Press, 2005. 2683-2686 p.
National Category
Signal Processing
Identifiers
URN: urn:nbn:se:lnu:diva-61600DOI: 10.1109/ISCAS.2005.1465179OAI: oai:DiVA.org:lnu-61600DiVA: diva2:1083623
Conference
IEEE International Symposium on Circuits And Systems (ISCAS) ’05, 23-26 May, 2005
Available from: 2017-03-21 Created: 2017-03-21 Last updated: 2017-04-11Bibliographically approved

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Cijvat, Ellie
Signal Processing

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CiteExportLink to record
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Citation style
  • apa
  • harvard1
  • ieee
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