CMOS Transceiver Front-Ends in Mobile Communication Handsets: Architectures and Building Blocks
2004 (English)Doctoral thesis, monograph (Other academic)
For mobile communication systems in the low-GHz range, CMOS has increasingly become the technology of choice, and the level of integration in mobile handsets has risen. The use of off-chip components, which increases the handset assembly time and costs, is preferably avoided. However, integrating a complete transceiver on a single chip leads to disturbances between building blocks. This imposes new and more stringent requirements on building block and transceiver performance, as well as impacts the choice of transceiver architecture.
In the general introduction, an overview is given of front-end receiver and transmitter aspects as well as RF CMOS technology. This includes the impact of mobile communication system specifications on architectures and building blocks, transistor and monolithic inductor modeling, and disturbance issues. Special attention is given to power amplifiers, the most challenging building blocks in CMOS transceivers. Papers I, II and III address CMOS receiver front-end aspects and implementations, while in papers IV and V design and challenges of CMOS power amplifiers are described.
Place, publisher, year, edition, pages
Lund: Lund University , 2004. , 198 p.
Series of licentiate and doctoral theses / Department of Applied Electronics, ISSN 1402-8662 ; 49
RF CMOS, Wireless Communication, Receiver, Transmitter, Power Amplifier, Harmonic Distortion, Electrical engineering, Elektroteknik, Telecommunication engineering, Telekommunikationsteknik
Electrical Engineering, Electronic Engineering, Information Engineering
Research subject Physics, Electrotechnology
IdentifiersURN: urn:nbn:se:lnu:diva-61603OAI: oai:DiVA.org:lnu-61603DiVA: diva2:1083626